Xilinx University Program (XUP) - DSP for FPGA Primer is an intensive, two-day introductory course designed for professors, researchers, and engineers who need to bridge the gap between traditional signal processing theory and hardware implementation. Course Overview & Format
The Primer’s Evolution: It now teaches how to partition an algorithm: Xilinx University Program - DSP for FPGA Primer...
A standard CPU fetches one instruction and one piece of data at a time. A DSP core might have a Harvard architecture (separate memory buses), but it still processes sequentially. An FPGA has no "instruction counter." Every multiplier and adder you instantiate runs at the same time. Xilinx University Program (XUP) - DSP for FPGA